Scaling Photonic Integrated Circuits to beat the bandwidth

Fueled by streaming video, online gaming, remote offices, and generative artificial intelligence (AI), the exploding demand for bandwidth is rippling throughout data centre architectures, where it is felt most acutely by the humble pluggable optical transceiver.

Most transceivers connecting the switches, servers, and other network systems in today’s data centres support signal processing rates of 400 Gbps, though many exhibitors at next month’s OFC 2025 event will be highlighting 800 Gbps devices, and 1.6 Tbps transceivers are already on the horizon. As future transceivers ramp up the bandwidth, they will also need to minimise power consumption as measured by picojoules per bit.

Progress toward these goals will traverse a narrowing bridge defined by tighter integration of the photonic and electronic functions within a pluggable transceiver. Silicon is widely viewed as the most promising material for building that bridge, though not the only one.

Silicon is a well-understood and proven materials technology for the large-scale integration of the electronic circuits produced in volume for decades by CMOS foundries. Silicon photonics (SiP) takes the next step by further enabling the incorporation of hundreds of photonic integrated circuits (PICs) onto the same silicon chip. The proximity of these components could then power transceivers able to support AI training and inference networks with increased parallelism and bandwidth, with low latency.

The catch is that silicon photonics does not rely solely on silicon. While silicon-on-insulator (SOI) wafers form the base, silicon’s inherent inability to generate coherent light makes SiP chips reliant on indium phosphide (InP) to provide the lasers for their optical signals.

Though less familiar to CMOS fabs, InP is also a well-established technology. For decades, it has powered lasers for the dense wavelength-division multiplexers (DWDM) driving long-haul and metro telecom networks around the globe. InP material is also a fixture in data centres, where discrete InP lasers drive both direct detect and coherent pluggables.

Here, “discrete” means that the lasers are external to the chip package or are possibly integrated within it if bonded to a chip. Monolithic integration of InP lasers onto a silicon wafer remains problematic for conventional CMOS processes. But several companies have achieved the next best thing.

In 2022 Intel marked a turning point by using conventional lithography processes to first define waveguide gratings in silicon before bonding InP lasers to the silicon surface. It later sold its hybrid integration process to Jabil. Around the same period, Sivers Photonics (booth #6151), ASMPT AMICRA (booth #5675), and PhotonDelta technology partner Imec (booth #3224) announced that they had achieved wafer-scale integration of InP lasers from Sivers’ InP100 platform onto Imec’s SiP platform.

These advances gave SiP a big head start on alternative material platforms such as InP for next-generation transceivers, and it will likely maintain that lead for several years. But InP carries one major advantage over silicon: it alone can support the fabrication of every photonic component within a pluggable transceiver. As noted, it already provides the laser component for SiP chips, and it also excels at photonic modulation, amplification, transmission, and detection.

A matter of scale

In short, only InP offers a single, uniform material platform able to perform all photonic functions on a single integrated chip. That positions it well to play the long game against SiP, which could find itself struggling to achieve the integration density and complexity of future transceivers.

For now, the most immediate challenge for InP is its need to scale. It trails far behind silicon in this regard. Current SOI wafers measure between approximately 8 and 12 inches, whereas InP wafers are largely constrained to 4-inch diameters. That limits the number of InP-based PICs that can be processed at a time, which further raises their cost.

The diameter gap is closing, however. Last December, Coherent (booth #1519) announced that it had established the capability to fabricate 6-inch InP wafers, significantly increasing production capacity and lowering die costs for InP optoelectronic devices.

This wafer expansion was only the latest development from a host of companies demonstrating that deeper integration can further help InP in its race against SiP. Infinera (booth #1818), now part of Nokia, has long relied on in-house InP development to fabricate its next-generation transceivers, such as the ICE series. The latest generation of ICE-D transceivers leverages InP to integrate multiple photonic components on a single monolithic chip, including distributed-feedback (DFB) lasers, multichannel arrays, ultra-low-voltage modulators, and photodiode arrays. ICE-D can support connectivity speeds above 3.2 Tb/s while driving down power per bit by as much as 75%.

InP’s integration potential has further nurtured a small network of innovators within PhotonDelta’s ecosystem of integrated photonics companies. Though fluent in multiple PIC material platforms, independent design house Bright Photonics works with InP to develop integrated photonic chips for high-speed optical communication applications. 

Another partner, SMART Photonics (booth #6067), is the world’s first pure-play InP foundry able to offer the wafers, expertise, and open-access manufacturing model needed to develop advanced PICs. The company also offers a broad and growing process design kit of photonic InP components to help designers align their PICs with SMART’s foundry process.

Effect Photonics (booth #2850) — also part of the PhotonDelta ecosystem — specializes in the development of InP-based PICs for optical communications and other applications. The company’s Manta chip, for example, was the world’s first fully photonic integrated circuit targeting pluggable coherent transceivers for edge and metro/access networks.

SiP and InP are not in this race alone. PIC designers are exploring other material platforms as well, including silicon nitride for low-loss integrated waveguides and both thin-film lithium niobate and barium titanite for ultra-high-speed modulators. But silicon and InP remain the most established and ready platforms for PICs and are likely to dominate discussions at OFC 2025. Curious to understand the benefits each of these major material platforms offers? Click here.

Regardless of what material platform PICs leverage, the aim is to leverage the power of photonics technology to enhance performance, and not only for transceivers. PhotonDelta partner, Astrape Networks, is leveraging advanced photonics technology to develop an optical switch that converts data into photonic signals only at the network edge. Its switch technology could reduce energy consumption by 20% at current network speeds, and the company expects it can further improve that performance in the near future. You can find them at booth #6163.

Talk to us

Stimulating collaboration to advance PICs is central to the mission of PhotonDelta (booth #6167) and its partners, whether the devices are based on SOI, InP, SiN, or other materials. Where Smart Photonics is a pure-play foundry for InP, our technology partner Imec is achieving breakthroughs with SOI as well as hybrid systems. Meanwhile, other partners, such as LioniX International (booth #6165), are exploring the potential of Silicon Nitride for integrated waveguides that offer very low propagation losses. If you would like to set up a meeting with us to learn more about the power of PICs and PhotonDelta’s collaborative ecosystem, please reach out to office@photondelta.com.